MCQs in Field Effect Transistor Amplifiers

This is the Multiple Choice Questions in Field Effect Transistor Amplifiers from the book Electronic Devices and Circuit Theory 10th Edition by Robert L. Boylestad. If you are looking for a reviewer in Electronics Engineering this will definitely help. I can assure you that this will be a great help in reviewing the book in preparation for your Board Exam. Make sure to familiarize each and every questions to increase the chance of passing the ECE Board Exam.

Online Questions and Answers Topic Outline

• MCQs in FET Amplifiers
• MCQs in FET Small-Signal Model
• MCQs in JFET Fixed-Bias Configuration
• MCQs in JFET Self-Bias Configuration
• MCQs in JFET Voltage-Divider Configuration
• MCQs in JFET Source-Follower (Common-Drain) Configuration
• MCQs in JFET Common-Gate Configuration
• MCQs in Depletion-type MOSFETs
• MCQs in Enhancement-type MOSFETs
• MCQs in E-MOSFET Drain-Feedback Configuration
• MCQs in E-MOSFET Voltage-Divider Configuration
• MCQs in Designing FET Amplifier Networks

Practice Exam Test Questions

Choose the letter of the best answer in each questions.

1. FET amplifiers provide ________.

• A) excellent voltage gain
• B) high input impedance
• C) low power consumption
• D) All of the above

2. A BJT is a ________-controlled device.

• A) current
• B) voltage
• C) power
• D) resistance

3. An FET is a ________-controlled device.

• A) current
• B) voltage
• C) power
• D) resistance

4. The E-MOSFET is quite popular in ________ applications.

• A) digital circuitry
• B) high-frequency
• C) buffering
• D) All of the above

5. What is the range of g_m for JFETs?

• A) 1 µS to 10 µS
• B) 100 µS to 1000 µS
• C) 1000 µS to 5000 µS
• D) 10000 µS to 100000 µS

6. For what value of I_D is g_m equal to 0.5 g_m0?

• A) 0 mA
• B) 0.25 I_DSS
• C) 0.5 I_DSS
• D) I_DSS

7. What is the typical value for the input impedance Z_i for JFETs?

• A) 100 kΩ
• B) 1 MΩ
• C) 10 MΩ
• D) 1000 MΩ

8. Referring to the transfer characteristics shown below, calculate g_m at V_GSQ = –1 V.

• A) 2 mS
• B) 3 mS
• C) 4 mS
• D) 5 mS

9. Use the following equation to calculate gm for a JFET having I_DSS = 10 mA, V_P = –5 V, and V_GSQ = –2.5 V.

• A) 2 mS
• B) 3 mS
• C) 4 mS
• D) 5 mS

10. Referring to the following figure, calculate g_m for V_GSQ = –1.25 V.

• A) 2 mS
• B) 2.5 mS
• C) 2.75 mS
• D) 3.25 mS

11. Referring to this figure, obtain g_m for I_D = 6 mA.

• A) 2.83 mS
• B) 3.00 mS
• C) 3.25 mS
• D) 3.46 mS

12. Referring to the figure below, determine the output impedance for V_GS = –3 V at V_DS = 5 V.

• A) 100 kΩ
• B) 80 kΩ
• C) 25 kΩ
• D) 5 kΩ

13. Calculate g_m and r_d if y_fs = 4 mS and y_os = 15 ΩS.

• A) 4 mS, 66.7 kΩ
• B) 4 mS, 15 kΩ
• C) 66.7 kΩ, 4 mS
• D) None of the above

14. The steeper the slope of the I_D versus V_GS curve, the ________ the level of g_m.

• A) less
• B) same
• C) greater

15. When V_GS = 0.5 V_p g_m is ________ the maximum value.

• A) one-fourth
• B) one-half
• C) three-fourths
• D) two-thirds

16. If I_D = I_DSS / 2, g_m = ___________ g_mo.

• A) 1
• B) 0.707
• C) 0.5
• D) 1.414

17. The more horizontal the characteristic curves on the drain characteristics, the ________ the output impedance.

• A) less
• B) same
• C) greater

18. What is (are) the function(s) of the coupling capacitors C₁ and C₂ in an FET circuit?

• A) to create an open circuit for dc analysis
• B) to isolate the dc biasing arrangement from the applied signal and load
• C) to create a short-circuit equivalent for ac analysis
• D) All of the above

19. Where do you get the level of g_m and r_d for an FET transistor?

• A) from the dc biasing arrangement
• B) from the specification sheet
• C) from the characteristics
• D) All of the above

20. Referring to this figure, find Z_o if y_os = 20 µS.

• A) 1.85 kΩ
• B) 1.92 kΩ
• C) 2.05 kΩ
• D) 2.15 kΩ

21. Referring to this figure, calculate A_v if y_os = 20 µS.

• A) –3.48
• B) –3.56
• C) –3.62
• D) –4.02

22. For the fixed-bias configuration, if r_d < 10 • R_D, then Z_o = ________.

• A) R_D
• B) R_D || r_d
• C) RG
• D) -gm • (R_D || r_d)

23. Which of the following is a required condition to simplify the equations for Z_o and A_v for the self-bias configuration?

• A) r_d ≤ 10R_D
• B) r_d = R_D
• C) r_d ≥ 10R_D
• D) None of the above

24. Referring to this figure, calculate Z_o if y_os = 40 µS.

• A) 2.92 kΩ
• B) 3.20 kΩ
• C) 3.25 kΩ
• D) 3.75 kΩ

25. On which of the following parameters does r_d have no or little impact in a source-follower configuration?

• A) Zi
• B) Zo
• C) Av
• D) All of the above

26. Referring to this figure, calculate Z_o for V_GSQ = –3.2 V.

• A) 362.52 Ω
• B) 340.5 Ω
• C) 420.5 Ω
• D) 480.9 Ω

27. Referring to this figure, calculate Z_i for y_os = 20 µS. Assume V_GSQ = −2.2V.

• A) 300.2 Ω
• B) 330.4 Ω
• C) 340.5 Ω
• D) 350.0 Ω

28. Which of the following is (are) related to depletion-type MOSFETs?

• A) V_GSQ can be negative, zero, or positive.
• B) g_m can be greater or smaller than g_m0’.
• C) I_D can be larger than I_DSS’.
• D) All of the above

29. Referring to this figure, calculate A_v for y_os = 58 µS.

• A) –7.29
• B) –7.50
• C) –8.05
• D) –8.55

30. Referring to this figure, calculate Z_i if r_d = 19 kΩ.

• A) 2.42 MΩ
• B) 2.50 MΩ
• C) 2.53 MΩ
• C) 2.59 MΩ

31. Referring to this figure, calculate Z_o if r_d = 19 kΩ.

• A) 1.75 kΩ
• B) 1.81 kΩ
• C) 1.92 kΩ
• D) 2.00 kΩ

32. Referring to this figure, calculate A_v if r_d = 19 kΩ.

• A) –2.85
• B) –3.26
• C) –2.95
• D) –3.21

33. Determine the value for R_D if the ac gain is 8.

• A) 1.51 kΩ
• B) 1.65 kΩ
• C) 1.85 kΩ
• D) 2.08 kΩ

34. Referring to this figure, calculate the value of R_D if the ac gain is 10. Assume V_GSQ = ¼V_p.

• A) 2.2 kΩ
• B) 2.42 kΩ
• C) 2.62 kΩ
• D) 2.82 kΩ

35. For an FET small-signal amplifier, one could go about troubleshooting a circuit by ________.

• A) viewing the circuit board for poor solder joints
• B) using a dc meter
• C) applying a test ac signal
• D) All of the above

Fill-in-the-blanks Questions

1. A field-effect transistor amplifier provides excellent voltage gain with the added feature of a _____ input impedance.

• A) low
• B) medium
• C) high
• D) None of the above

2. The depletion MOSFET circuit has a _____ input impedance than a similar JFET configuration.

• A) much higher
• B) much lower
• C) lower
• D) higher

3. The _____ is quite popular in digital circuits, especially in CMOS circuits that require very low power consumption.

• A) JFET
• B) BJT
• C) D-type MOSFET
• D) E-type MOSFET

4. _____ is the amplification factor in FET transistor amplifiers.

• A) Z_i
• B) g_m
• C) I_D
• D) I_G

5. _____ is an undefined quantity in a JFET.

• A) A_i
• B) A_v
• C) Z_i
• D) Z_o

6. The _____ controls the _____ of an FET.

• A) I_D’, V_GS
• B) V_GS’, I_D
• C) I_G’, V_DS
• D) I_G’, I_D

7. Transconductance is the ratio of changes in _____.

• A) I_D to V_GS
• B) I_D to V_DS
• C) V_GS to I_G
• D) V_GS to V_DS

8. The transconductance g_m _____ as the Q-point moves from V_p to I_DSS

• A) decreases
• B) remains the same
• C) increases
• D) None of the above

9. g_m has its maximum value for a JFET at _____.

• A) V_p
• B) 0.5 V_p
• C) 0.3 V_p
• D) I_DSS

10. The value of gm is at its maximum g_m0 at VG_S equal to _____ and zero at V_GS equal to _____.

• A) 0 V, V_p
• B) V_p, 0 V
• C) 0.5V_p, 0.3V_p
• D) 0.3V_p , 0.5V_p

11. The range of input impedance Z_i for MOSFETs is _____.

• A) 1 kΩ –10 kΩ
• B) 100 kΩ –1 MΩ
• C) 10 MΩ –100 MΩ
• D) 10¹² Ω to 10¹⁵ Ω

12. The range of output admittance y_os for FETs is _____.

• A) 5 µS –10 µS
• B) 10 µS –50 µS
• C) 50 µS –100 µS
• D) 200 µS –500 µS

13. The _____ configuration has the distinct disadvantage of requiring two dc voltage sources.

• A) self-bias
• B) voltage-divider
• C) fixed-bias
• D) All of the above

14. _____ is the network-input impedance for a JFET fixed-bias configuration.

• A) R_G
• B) R_D
• C) Zero
• D) None of the above

15. _____ is a required step in order to calculate Z_o.

• A) Setting I_G equal to zero
• B) Setting V_i equal to zero
• C) Setting I_D equal to I_DSS
• D) None of the above

16. _____ configuration(s) has (have) Z_o ≈ R_D.

• A) Fixed-bias
• B) Self-bias
• C) Voltage-divider
• D) All of the above

17. _____ is the only parameter that is different between voltage-divider and fixed-bias configurations.

• A) Z_i
• B) A_v
• C) Z_o
• D) None of the above

18. The input and output signals are in phase in a _____ configuration.

• A) fixed-bias
• B) source-follower
• C) voltage-divider
• D) self-bias

19. A _____ configuration has a voltage gain less than 1.

• A) fixed-bias
• B) self-bias
• C) source-follower
• D) voltage-divider

20. The input and output signals are 180º out of phase in a _____ configuration.

• A) source-follower
• B) common-gate
• C) common-drain
• D) voltage-divider

21. The isolation between input and output circuits in the ac equivalent circuit is lost in a _____ configuration.

• A) common-gate
• B) common-source
• C) common-drain
• D) None of the above

22. The _____ configuration has an input impedance, which is other than R_G.

• A) common-source
• B) common-gate
• C) common-drain
• D) None of the above

23. The gate-to-source voltage V_GS of a(n) _____ must be larger than the threshold V_GS(Th) for the transistor to conduct.

• A) JFET
• B) D-type MOSFET
• C) E-type MOSFET
• D) None of the above

24. r_d changes from one operation region to another with _____ values typically occurring at _____ levels of V_GS (closer to zero).

• A) lower, lower
• B) lower, higher
• C) higher, lower
• D) None of the above

25. The _____ does not support Shockley's equation.

• A) JFET
• B) D-type MOSFET
• C) E-type MOSFET
• D) None of the above

Check your work.

Answer in Field Effect Transistor Amplifiers

Complete List of Chapter Quiz in Electronic Devices and Circuit Theory

Multiple Choice Questions in Electronic Devices and Circuit Theory

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credit: Robert L. Boylestad© 2014 www.PinoyBIX.org